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GD32VF103系列
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概述
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产品组合
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产品选择器
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文档
概述
GD32VF103系列MCU接纳了全新的基于开源指令集架构RISC-V的Bumblebee处置惩罚器内核，提供了108MHz的运算主频，以及16KB到128KB的片上闪存和6KB到32KB的SRAM缓存。芯片接纳2.6V-3.6V供电，I/O口可遭受5V电平。
为普遍的主流应用配备的多种外设资源，包括多达3个USART、2个UART、3个SPI、2个I2C、2个I2S、2个CAN2.0B和1个USB 2.0 FS OTG，以及外部总线扩展控制器(EXMC)。内置的USB 2.0 FSOTG接口可提供Device、HOST、OTG等多种模式。外部总线扩展控制器(EXMC)更利便毗连NOR Flash，SRAM等外部存储器。集成了2个采样率高达2.6M SPS的12位高速ADC，提供了多达16个可复用通道，并支持16-bit硬件过采样滤波功效和区分率可设置功效，还拥有2个12位DAC。多达80%的GPIO具有多种可选功效还支持端口重映射，一连以无邪富厚的毗连性知足主流开发应用需求。周全适用于工业控制、消耗电子、新兴IOT、边沿盘算及笔直行业的嵌入式市场应用。
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接纳RISC-V内核，主频高达108MHz
存储容量支持128KB Flash以及32KB SRAM
产品选择器
14条效果
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Part No.
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Core
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Series
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Package
QFN36
LQFP64
LQFP48
LQFP100
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Max Speed (MHz)
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Flash (Bytes)
16K
32K
64K
128K
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SRAM (Bytes)
6K
10K
20K
32K
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I/O
up to 80
up to 51
up to 37
up to 26
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GPTM (32bit)
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GPTM (16bit)
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Advanced TM (16bit)
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HRTM
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Basic TM (64bit)
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Basic TM (32bit)
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Basic TM (16bit)
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LPTM (32bit)
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LPTM (16bit)
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SysTick (64bit)
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SysTick (24bit)
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WDG
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RTC
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USART+UART
2+0
3+2
3+0
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LPUART
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I2C
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QSPI
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SPI
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I2S
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CAN 2.0B
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USB 2.0
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Ethernet
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SDIO
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EtherCAT Slave Controller
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MFCOM
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LIN
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LCD-TFT
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Segment LCD
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Camera
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IPA
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SAI
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TMU
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EXMC
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CEC
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14bit ADC Units (CHs)
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12bit ADC Units (CHs)
2(16)
2(10)
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12bit DAC Units
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Comp
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IEEE 802.11
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Bluetooth
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|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RISC-V | GD32VF103 | QFN36 | 108 | 16K | 6K | up to 26 | 0 | 2 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | QFN36 | 108 | 32K | 10K | up to 26 | 0 | 2 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | QFN36 | 108 | 64K | 20K | up to 26 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | QFN36 | 108 | 128K | 32K | up to 26 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP48 | 108 | 16K | 6K | up to 37 | 0 | 2 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP48 | 108 | 32K | 10K | up to 37 | 0 | 2 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP48 | 108 | 64K | 20K | up to 37 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 2 | 0 | 3 | 2 | 2 | FS OTG | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP48 | 108 | 128K | 32K | up to 37 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 2 | 0 | 3 | 2 | 2 | FS OTG | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP64 | 108 | 16K | 6K | up to 51 | 0 | 2 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP64 | 108 | 32K | 10K | up to 51 | 0 | 2 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 2 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP64 | 108 | 64K | 20K | up to 51 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 2 | FS OTG | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP64 | 108 | 128K | 32K | up to 51 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 2 | FS OTG | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP100 | 108 | 64K | 20K | up to 80 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 2 | FS OTG | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
| RISC-V | GD32VF103 | LQFP100 | 108 | 128K | 32K | up to 80 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 2 | FS OTG | 0 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 |
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宣布时间
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2024-07-11
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2023-08-28
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2024-06-04
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2024-12-20
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2024-12-20
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2023-08-28
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2022-12-08
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2022-04-21
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2022-04-21
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2022-04-21
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2024-11-25
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